SI5338 Datasheet, PDF (163/170 Pages) Silicon Laboratories – I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5338
Pin # Pin Name
15
VDDO2
16
VDDO1
17
CLK1B
18
CLK1A
19
SDA
20
VDDO0
21
CLK0B
22
CLK0A
23
GND
24
VDD
GND
PAD
GND
Table 17. Si5338 Pin Descriptions (Continued)
I/O
VDD
VDD
O
O
I/O
VDD
O
O
GND
VDD
GND
Signal Type
Description
Supply
Output Clock Supply Voltage.
Supply voltage (3.3, 2.5, 1.8, or 1.5 V) for CLK2A,B.
A 0.1 µF capacitor must be located very close to this pin. If CLK2 is
not used, this pin must be tied to VDD (pin 7, 24).
Supply
Output Clock Supply Voltage.
Supply voltage (3.3, 2.5, 1.8, or 1.5 V) for CLK1A,B.
A 0.1 µF capacitor must be located very close to this pin. If CLK1 is
not used, this pin must be tied to VDD (pin 7, 24).
Multi
Output Clock B for Channel 1.
May be a single-ended output or half of a differential output with
CLK1A being the other differential half. If unused, leave this pin
floating.
Multi
LVCMOS
Output Clock A for Channel 1.
May be a single-ended output or half of a differential output with
CLK1B being the other differential half. If unused, leave this pin
floating.
I²C Serial Data.
This is the serial data for the I²C bus. A pullup resistor at this pin is
required. Typical values would be 1–4 k. See the I²C bus spec
for more information. This pin is 3.3 V tolerant regardless of the
other supply voltages on pins 7, 11, 15, 16, 20, 24.
Supply
Output Clock Supply Voltage.
Supply voltage (3.3, 2.5, 1.8, or 1.5 V) for CLK0A,B.
A 0.1 µF capacitor must be located very close to this pin. If CLK0 is
not used, this pin must be tied to VDD (pin 7, 24).
Multi
Output Clock B for Channel 0.
May be a single-ended output or half of a differential output with
CLK0A being the other differential half. If unused, leave this pin
floating.
Multi
Output Clock A for Channel 0.
May be a single-ended output or half of a differential output with
CLK0B being the other differential half. If unused, leave this pin
floating.
GND
Ground.
Must be connected to system ground. Minimize the ground path
impedance for optimal performance of this device.
Supply
Core Supply Voltage.
The device operates from a 1.8, 2.5, or 3.3 V supply. A 0.1 µF
bypass capacitor should be located very close to this pin.
GND
Ground Pad.
This is the large pad in the center of the package. Device
specifications cannot be guaranteed unless the ground pad is
properly connected to a ground plane on the PCB. See Table 20,
“PCB Land Pattern,” on page 167 for ground via requirements.
Rev. 0.6
163