SI5338 Datasheet, PDF (107/170 Pages) Silicon Laboratories – I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5338
Register 122.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name CLK3_DISST[1:0]
MS3_PHSTEP[13:8]
Type
R/W
R/W
Reset value = xxxx xxxx
Bit
Name
Function
MultiSynth3 Output Driver State When Disabled.
00: High impedance
7:6
CLK3_DISST[1:0]
01: Logic low
10: Logic high
11: Always on even if disabled
MultiSynth3 Phase Step Size.
The phase step size is MultiSynth3_PHSTEP[13:0] x Tvco/128 where
5:0
MS3_PHSTEP[13:8]
Tvco is the period of the VCO. Either the phase inc/dec pins (if avail-
able) or register 85[1:0] will control the stepping of phase. A phase
increment will delay the clock edge.
Register 123.
Bit
D7
D6
Name
Type
Reset value = xxxx xxxx
Bit
Name
7:0
MS0_FIDP1[7:0]
D5
D4
D3
D2
D1
D0
MS0_FIDP1[7:0]
R/W
Function
MultiSynth0 Frequency Increment/Decrement Parameter 1.
Rev. 0.6
107