C8051F99X_10 Datasheet, PDF (8/322 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
List of Figures
Figure 1.1. C8051F980 Block Diagram .................................................................... 18
Figure 1.2. C8051F981 Block Diagram .................................................................... 18
Figure 1.3. C8051F982 Block Diagram .................................................................... 19
Figure 1.4. C8051F983 Block Diagram .................................................................... 19
Figure 1.5. C8051F985 Block Diagram .................................................................... 20
Figure 1.6. C8051F986 Block Diagram .................................................................... 20
Figure 1.7. C8051F987 Block Diagram .................................................................... 21
Figure 1.8. C8051F988 Block Diagram .................................................................... 21
Figure 1.9. C8051F989 Block Diagram .................................................................... 22
Figure 1.10. C8051F990 Block Diagram .................................................................. 22
Figure 1.11. C8051F991 Block Diagram .................................................................. 23
Figure 1.12. C8051F996 Block Diagram .................................................................. 23
Figure 1.13. C8051F997 Block Diagram .................................................................. 24
Figure 1.14. Port I/O Functional Block Diagram ....................................................... 26
Figure 1.15. PCA Block Diagram.............................................................................. 27
Figure 1.16. ADC0 Functional Block Diagram.......................................................... 28
Figure 1.17. ADC0 Multiplexer Block Diagram ......................................................... 29
Figure 1.18. Comparator 0 Functional Block Diagram ............................................. 30
Figure 3.1. QFN-20 Pinout Diagram (Top View) ...................................................... 35
Figure 3.2. QFN-24 Pinout Diagram (Top View) ...................................................... 36
Figure 3.3. QSOP-24 Pinout Diagram (Top View).................................................... 37
Figure 3.4. QFN-20 Package Drawing ..................................................................... 38
Figure 3.5. Typical QFN-20 Landing Diagram.......................................................... 39
Figure 3.6. QFN-24 Package Drawing ..................................................................... 41
Figure 3.7. Typical QFN-24 Landing Diagram.......................................................... 42
Figure 3.8. QSOP-24 Package Diagram .................................................................. 44
Figure 3.9. QSOP-24 Landing Diagram ................................................................... 45
Figure 4.1. Active Mode Current (External CMOS Clock) ........................................ 50
Figure 4.2. Idle Mode Current (External CMOS Clock) ............................................ 51
Figure 4.3. Typical VOH Curves, 1.8–3.6 V ............................................................. 53
Figure 4.4. Typical VOL Curves, 1.8–3.6 V .............................................................. 54
Figure 5.1. ADC0 Functional Block Diagram............................................................ 64
Figure 5.2. 10-Bit ADC Track and Conversion Example Timing (BURSTEN = 0).... 67
Figure 5.3. Burst Mode Tracking Example with Repeat Count Set to 4 ................... 68
Figure 5.4. ADC0 Equivalent Input Circuits .............................................................. 69
Figure 5.5. ADC Window Compare Example: Right-Justified Single-Ended Data ... 80
Figure 5.6. ADC Window Compare Example: Left-Justified Single-Ended Data...... 80
Figure 5.7. ADC0 Multiplexer Block Diagram ........................................................... 81
Figure 5.8. Temperature Sensor Transfer Function ................................................. 83
Figure 5.9. Temperature Sensor Error with 1-Point Calibration (V_REF = 1.65 V) ..... 84
Figure 5.10. Voltage Reference Functional Block Diagram...................................... 86
Figure 7.1. Comparator 0 Functional Block Diagram ............................................... 91
Figure 7.2. Comparator Hysteresis Plot ................................................................... 93
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Rev. 1.0