C8051F99X_10 Datasheet, PDF (127/322 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
10. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization of the
C8051F99x-C8051F98x device family is shown in Figure 10.1.
PROGRAM/DATA MEMORY
(FLASH)
C8051F980/1/6/7
C8051F990/1/6/7
0x1FFF
8 kB FLASH
(In-System
Programmable in 512
Byte Sectors)
0x0000
0x0FFF
C8051F982/3/8/9
4 kB FLASH
(In-System
Programmable in 512
Byte Sectors)
DATA MEMORY
(RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing Only)
Special Function
Registers
(Direct Addressing Only)
0
F
(Direct and Indirect
Addressing)
Bit Addressable
General Purpose
Registers
Lower 128 RAM
(Direct and Indirect
Addressing)
EXTERNAL DATA ADDRESS SPACE
0xFFFF
0x0000
Unpopulated Address Space
0x07FF
C8051F985
2 kB FLASH
(In-System
Programmable in 512
Byte Sectors)
0x0100
0x00FF
0x0000
XRAM - 256 Bytes
(accessable using MOVX
instruction)
0x0000
Figure 10.1. C8051F99x-C8051F98x Memory Map
Rev. 1.0
127