C8051F99X_10 Datasheet, PDF (165/322 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
The following wake-up sources can be configured to wake the device from sleep mode:
 SmaRTClock Oscillator Fail
 SmaRTClock Alarm
 Port Match Event
 Comparator0 Rising Edge
The comparator requires a supply voltage of at least 1.8 V to operate properly. On C8051F99x-C8051F98x
devices, the POR supply monitor can be disabled to save power by writing 1 to the MONDIS (PMU0MD.5)
bit. When the POR supply monitor is disabled, all reset sources will trigger a full POR and will re-enable the
POR supply monitor.
In addition, any falling edge on RST (due to a pin reset or a noise glitch) will cause the device to exit sleep
mode. In order for the MCU to respond to the pin reset event, software must not place the device back into
sleep mode for a period of 15 µs. The PMU0CF register may be checked to determine if the wake-up was
due to a falling edge on the RST pin. If the wake-up source is not due to a falling edge on RST, there is no
time restriction on how soon software may place the device back into sleep mode. A 4.7 k pullup resistor
to VDD is recommend for RST to prevent noise glitches from waking the device.
15.6. Configuring Wakeup Sources
Before placing the device in a low power mode, one or more wakeup sources should be enabled so that
the device does not remain in the low power mode indefinitely. For Idle Mode, this includes enabling any
interrupt. For Stop Mode, this includes enabling any reset source or relying on the RST pin to reset the
device.
Wake-up sources for suspend and sleep modes are configured through the PMU0CF register. Wake-up
sources are enabled by writing 1 to the corresponding wake-up source enable bit. Wake-up sources must
be re-enabled each time the device is placed in suspend or sleep mode, in the same write that places the
device in the low power mode.
The reset pin is always enabled as a wake-up source. On the falling edge of RST, the device will be
awaken from sleep mode. The device must remain awake for more than 15 µs in order for the reset to take
place.
15.7. Determining the Event that Caused the Last Wakeup
When waking from idle mode, the CPU will vector to the interrupt which caused it to wake up. When wak-
ing from stop mode, the RSTSRC register may be read to determine the cause of the last reset.
Upon exit from suspend or sleep mode, the wake-up flags in the PMU0CF and PMU0FL registers can be
read to determine the event which caused the device to wake up. After waking up, the wake-up flags will
continue to be updated if any of the wake-up events occur. Wake-up flags are always updated, even if they
are not enabled as wake-up sources.
All wake-up flags enabled as wake-up sources in PMU0CF and PMU0FL must be cleared before the
device can enter suspend or sleep mode. After clearing the wake-up flags, each of the enabled wake-up
events should be checked in the individual peripherals to ensure that a wake-up event did not occur while
the wake-up flags were being cleared.
Rev. 1.0
165