C8051F99X_10 Datasheet, PDF (228/322 Pages) Silicon Laboratories – Ultra Low Power, 8-2 kB Flash, Capacitive Sensing MCU

C8051F99x-C8051F98x
SFR Definition 21.12. P0DRV: Port0 Drive Strength
Bit
7
6
5
4
3
2
1
0
Name
P0DRV[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address = 0xA4
Bit Name
Function
7:0 P0DRV[7:0] Drive Strength Configuration Bits for P0.7–P0.0 (respectively).
Configures digital I/O Port cells to high or low output drive strength.
0: Corresponding P0.n Output has low output drive strength.
1: Corresponding P0.n Output has high output drive strength.
228
Rev. 1.0