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K4J52324QC Datasheet, PDF (56/57 Pages) Samsung semiconductor – 512Mbit GDDR3 SDRAM
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K4J52324QC-B
AC CHARACTERISTICS II-I
Parameter
Symbol
Row active time
tRAS
Row cycle time
tRC
Refresh row cycle time
tRFC
RAS to CAS delay for Read
tRCDR
RAS to CAS delay for Write
tRCDW
Row precharge time
tRP
Row active to Row active
tRRD
Four activate window
tFAW
Last data in to Row precharge (PRE or Auto-PRE) tWR
Last data in to Read command
tCDLR
Mode register set cycle time
tMRD
Auto precharge write recovery time + Precharge tDAL
Exit self refresh to Read command
tXSR
Power-down exit time
tPDEX
Refresh interval time
tREF
-BJ12
Min
Max
25
100K
35
-
45
-
12
-
8
-
10
-
8
-
40
-
11
-
6
-
7
-
21
-
20000
-
7tCK
+tIS
-
-
3.9
512M GDDR3 SDRAM
-BJ14
Min
Max
22
100K
31
-
39
-
10
-
6
-
9
-
8
-
40
-
10
-
5
-
6
-
19
-
20000
-
6tCK
+tIS
-
-
3.9
Unit Note
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
us
AC CHARACTERISTICS II-II
Parameter
Symbol
Row active time
tRAS
Row cycle time
tRC
Refresh row cycle time
tRFC
RAS to CAS delay for Read
tRCDR
RAS to CAS delay for Write
tRCDW
Row precharge time
tRP
Row active to Row active
tRRD
Four activate window
tFAW
Last data in to Row precharge (PRE or Auto-PRE) tWR
Last data in to Read command
tCDLR
Mode register set cycle time
tMRD
Auto precharge write recovery time + Precharge tDAL
Exit self refresh to Read command
tXSR
Power-down exit time
tPDEX
Refresh interval time
tREF
-BC14
Min
Max
22
100K
31
-
39
-
10
-
6
-
9
-
8
-
40
-
10
-
5
-
6
-
19
-
20000
-
6tCK
+tIS
-
-
3.9
-BC16
Min
Max
19
100K
28
-
33
-
10
-
6
-
9
-
7
-
35
-
9
-
4
-
5
-
18
-
20000
-
6tCK
+tIS
-
-
3.9
-BC20
Min
Max
15
100K
22
-
27
-
8
-
5
-
7
-
5
25
-
7
-
3
-
4
-
14
-
20000
-
4tCK
+tIS
-
-
3.9
Unit Note
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
us
- 56 -
Rev 1.0 (Mar 2005)
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