K4J52324QC Datasheet, PDF (25/57 Pages) Samsung semiconductor – 512Mbit GDDR3 SDRAM

K4J52324QC-B
512M GDDR3 SDRAM
DESELECT
The DESELECT function (/CS high) prevents new commands from being executed by the DDR(x32). The GDDR3(x32)
SDRAM is effectively deselected. Operations already in progress are not affected.
NO OPERATION (NOP)
The NO OPERATION (NOP) command is used to instruct selected GDDR3(x32) to perform a NOP (/CS LOW). This pre-
vents unwanted commands from being registered during idle or wait states. Operations already in progress are not
affected.
LOAD MODE REGISTER
The mode registers are loaded via inputs A0-A11. See mode register descriptions in the Register Definition section. The
Load Mode Register command can only be issued when all banks are idle, and a subsequent executable command can-
not be issued until tMRD is met.
ACTIVE
The ACTIVE command is used to open (or activate) a row in a particular bank for a subsequent access. The value on the
BA0,BA1, BA2 inputs selects the bank, and the address provided on inputsA0-A11 selects the row. This row remains
active (or open) for accesses until a PRECHARGE command is issued to that bank. A PRECHARGE command must be
issued before opening a different row in the same bank.
READ
The READ command is used to initiate a burst read access to an active row. The value on the BA0, BA1, BA2 inputs
selects the bank, and the address provided on inputs A0-A7, A9 selects the starting column location. The value on input
0
A8 determines whether or not auto precharge is used. If auto precharge is selected, the row being accessed will be pre-
charged at the end of the READ burst; if auto precharge is not selected, the row will remain open for subsequent
accesses.
WRITE
,V
The WRITE command is used to initiate a burst write access to an active row. The value on the BA0, BA1, BA2 inputs
selects the bank, and the address provided on inputs A0-A7, A9 selects the starting column location. The value on inputs
A8 determines whether or not auto precharge is used. If auto precharge is selected, the row being accessed will be pre-
charged at the end of the WRITE burst; if auto precharge is not selected, the row will remain open for subsequent
accesses. Input data appearing on the DQs is written to the memory array subject to the DM input logic level appearing
coincident with the data. If a given DM signal is registered LOW. the corresponding data will be written to memory; If the
DM signal is registered HIGH, the corresponding data inputs will be ignored, and a WRITE will not be executed to that
byte/column location.
PRECHARGE
The PRECHARGE command is used to deactivate the open row in a particular bank or the open row in all banks. The
bank(s) will be available for a subsequent row access a specified time (t_RP) after the PRECHARGE command is issued.
Input A8 determines whether one or all banks are to be precharged, and in the case where only one banks are to be pre-
charged, inputs BA0,BA1,BA2 select the bank. Otherwise BA0, BA1,BA2 are treated as "Don’t Care." Once a bank has
been precharged, it is in the idle state and must be activated prior to any READ or WRITE command will be treated as a
NOP if there is no open row is already in the process of precharging.
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Rev 1.0 (Mar 2005)