K4J52324QC Datasheet, PDF (45/57 Pages) Samsung semiconductor – 512Mbit GDDR3 SDRAM

K4J52324QC-B
512M GDDR3 SDRAM
GDDR3 tFAW Definition
For eight bank GDDR3 devices, there is a need to limit the number of activates in a rolling window to ensure that the
instanteous current supplying capability of the devices is not exceeded. To reflect the true capability of the DRAM instanta-
neous current supply, the same parameter tFAW(four activate window) as DDR2 is defined.
Eight bank device Sequential Bank Activation Restriction : No more than 4 banks may be activated in a rolling tFAW win-
dow. Converting to clocks is done by dividing tFAW(ns) by tCK(ns) and rounding up to next integer value. As an example
of the rolling window, if (tFAW/tCK) rounds up to 10 clocks, and an activate command is issued in clock N, no more than
three further activate commands may be issued in clocks N+1 through N+9.
CLK
CMD ACT ACT ACT ACT
t_RRD
t_RRD
t_RRD
t_FAW
t_FAW + 3*t_RRD
ACT ACT ACT ACT
t_RRD
t_RRD
t_RRD
- 45 -
Rev 1.0 (Mar 2005)