K4J52324QC Datasheet, PDF (33/57 Pages) Samsung semiconductor – 512Mbit GDDR3 SDRAM

K4J52324QC-B
Nonconsecutive READ Bursts
T0
T7
/CK
CK
512M GDDR3 SDRAM
T8 T8n T9 T9n T10
T17 T17n T18
COMMAND
READ
NOP
NOP
READ
NOP
NOP
NOP
ADDRESS
RDQS
Bank a,
Col n
CL = 8
Bank a,
Col b
DQ
DO
DO
n
b
T0
T1
/CK
CK
COMMAND
READ
NOP
ADDRESS
RDQS
Bank a,
Col n
CL = 8
T7
T8 T8n T9
NOP
READ
Bank a,
Col b
NOP
T10 T10n T11
NOP
NOP
DQ
DO
DO
n
b
DON’T CARE
TRANSITIONING DATA
NOTE : ^{1. DO n (or b) = data-out from column n (or column b).}
2. Burst length = 4
3. Three subsequent elements of data-out appear in the programmed order following DQ n.
4. Three subpsequent elements of data-out appear in the programmed order following DQ b.
5. Shown with nominal t_AC and t_DQSQ.
6. Example applies when READ commands are issued to different devices or nonconsecutive READs.
7. RDQS will start driving high one half-clock cycle prior to the first falling edge of RDQS.
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Rev 1.0 (Mar 2005)