HD6473887 Datasheet, PDF (94/523 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Bits 7 to 0: Wakeup interrupt request flags (IWPF7 to IWPF0)
Bit n
IWPFn
0
1
Description
Clearing conditions:
When IWPFn= 1, it is cleared by writing 0
(initial value)
Setting conditions:
When pin WKP_n is designated for wakeup input and a rising or falling edge is input at
that pin
(n = 7 to 0)
7. Wakeup Edge Select Register (WEGR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
WKEGS7 WKEGS6 WKEGS5 WKEGS4 WKEGS3 WKEGS2 WKEGS1 WKEGS0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WEGR is an 8-bit read/write register that specifies rising or falling edge sensing for pins WKPn.
WEGR is initialized to H'00 by a reset.
Bit n: WKPn edge select (WKEGSn)
Bit n selects WKPn pin input sensing.
Bit n
WKEGSn
0
1
Description
WKPn pin falling edge detected
WKPn pin rising edge detected
(initial value)
(n = 7 to 0)
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