HD6473887 Datasheet, PDF (318/523 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

• Receiving
Figure 10-13 shows an example of a flowchart for data reception. This procedure should be
followed for data reception after initializing SCI3.
Start
Read bits OER,
1 _{PER, FER in SSR}
OER + PER
Yes
+ FER = 1?
No
Read bit RDRF
2
in SSR
RDRF = 1?
Yes
Read receive
data in RDR
4
No
Receive error
processing
1. Read bits OER, PER, and FER in the
serial status register (SSR) to determine
if there is an error. If a receive error has
occurred, execute receive error
processing.
2. Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data
in RDR. When the RDR data is read,
bit RDRF is cleared to 0 automatically.
3. When continuing data reception, finish
reading of bit RDRF and RDR before
receiving the stop bit of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
3
Continue data
reception?
No
Clear bit RE to
0 in SCR3
Yes
(A)
End
Figure 10-13 Example of Data Reception Flowchart (Asynchronous Mode)
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