HD6473887 Datasheet, PDF (251/523 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

3. Register configuration
Table 9-17 shows the register configuration of the watchdog timer.
Table 9-17 Watchdog Timer Registers
Name
Abbrev. R/W
Timer control/status register W TCSRW R/W
Timer counter W
TCW
R/W
Clock stop register 2
CKSTP2 R/W
Port mode register 3
PMR3
R/W
Initial Value
H'AA
H'00
H'FF
H'00
Address
H'FFB2
H'FFB3
H'FFFB
H'FFCA
9.6.2 Register Descriptions
1. Timer control/status register W (TCSRW)
Bit
Initial value
Read/Write
7
B6WI
1
R
6
TCWE
0
R/W^*
5
B4WI
1
R
4
TCSRWE
0
R/W^*
3
B2WI
1
R
2
WDON
0
R/W^*
1
B0WI
1
R
0
WRST
0
R/W^*
Note: * Write is permitted only under certain conditions, which are given in the descriptions of
the individual bits.
TCSRW is an 8-bit read/write register that controls write access to TCW and TCSRW itself,
controls watchdog timer operations, and indicates operating status.
Bit 7: Bit 6 write inhibit (B6WI)
Bit 7 controls the writing of data to bit 6 in TCSRW.
Bit 7
B6WI
0
1
Description
Bit 6 is write-enabled
Bit 6 is write-protected
(initial value)
This bit is always read as 1. Data written to this bit is not stored.
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