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HD6473887 Datasheet, PDF (303/523 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer
Notes: The value set in BRR is given by the following equation:
N=
OSC — 1
(8 × 22n × B)
where
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 N 255)
OSC: Value of øOSC (Hz)
n: Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10-10.)
Table 10-10 Relation between n and Clock
SMR Setting
n Clock
CKS1
CKS0
0ø
0
0
0
øW/2*1/øW*2
0
1
2 ø/16
1
0
3 ø/64
1
1
Notes: 1. øW/2 clock is selected in active (medium- and high-speed) or sleep (medium-
and high-speed) mode.
2. øW clock is selected in subactive or subsleep mode. SCI3 can be used only
when the øW/2 is selected as the CPU operation clock in subactive or subsleep
mode.
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