HD6473887 Datasheet, PDF (231/523 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

b. TCFL, OCRFL
In toggle output, TMOFL pin output is toggled when a compare match occurs. If a TCRF
write by a MOV instruction and generation of the compare match signal occur
simultaneously, TOLL data is output to the TMOFL pin as a result of the TCRF write.
If an OCRFL write and compare match signal generation occur simultaneously, the
compare match signal is invalid. However, if the written data and the counter value match,
a compare match signal will be generated at that point. As the compare match signal is
output in synchronization with the TCFL clock, a compare match will not result in compare
match signal generation if the clock is stopped.
If a TCFL write and overflow signal output occur simultaneously, the overflow signal is
not output.
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