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UPD70F3786GJ-GAE-AX Datasheet, PDF (802/1817 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-E Microcontrollers
V850ES/JH3-E, V850ES/JJ3-E
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
17.3.5 Mode switching between UARTC4 and CSIE0
In the V850ES/JH3-E and V850ES/JJ3-E, UARTC4 and CSIE0 share of the same pin and therefore cannot be used
simultaneously. Set UARTC4 in advance, using the PMC4, PFC4, and PFCE4 registers, before use.
Caution The transmit/receive operation of UARTC4 and CSIE0 is not guaranteed if these functions are
switched during transmission or reception. Be sure to disable the one that is not used.
Figure 17-6. UARTC4 and CSIE0 Mode Switch Settings
After reset: 0000H R/W Address: PMC4 FFFFF448H,
PMC4L FFFFF448H, PMC4H FFFFF449H
PMC4
15
0Note
14
0Note
13
0Note
12
0Note
11
0Note
10
0Note
9
0Note
8
PMC48Note
PMC47Note PMC46 PMC45 PMC44 PMC43 PMC42 PMC41 PMC40
After reset: 0000H R/W Address: PFC4 FFFFF468H,
PFC4L FFFFF468H, PFC4H FFFFF469H
PFC4
15
0Note
14
0Note
13
0Note
12
0Note
11
0Note
10
0Note
9
0Note
8
PFC48Note
PFC47Note PFC46 PFC45 PFC44 PFC43 PFC42 PFC41 PFC40
After reset: 00H R/W Address: FFFFF708H
PFCE4 PFCE47Note PFCE46Note PFCE45 PFCE44 PFCE43 PFCE42 PFCE41 PFCE40
PMC45
0
1
PFCE45
×
0
PFC45
×
0
Operation mode
Port I/O mode
SCKE0 (CSIE0)
PMC44
0
1
1
PFCE44
×
0
0
PFC44
×
0
1
Operation mode
Port I/O mode
SOE0 (CSIE0)
RXDC4 (UARTC4)
PMC43
0
1
1
PFCE43
×
0
0
PFC43
×
0
1
Operation mode
Port I/O mode
SIE0 (CSIE0)
TXDC4 (UARTC4)
Note V850ES/JJ3-E only
Remark × = don’t care
R01UH0290EJ0300 Rev.3.00
Sep 19, 2011
Page 802 of 1817