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UPD70F3786GJ-GAE-AX Datasheet, PDF (1140/1817 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-E Microcontrollers
V850ES/JH3-E, V850ES/JJ3-E
CHAPTER 21 CAN CONTROLLER
21.13.3 Self-test mode
In the self-test mode, message frame transmission and message frame reception can be tested without connecting the
CAN node to the CAN bus or without affecting the CAN bus.
In the self-test mode, the CAN module is completely disconnected from the CAN bus, but transmission and reception
are internally looped back. The CAN transmission pin (CTXD0) is fixed to the recessive level.
If the falling edge on the CAN reception pin (CRXD0) is detected after the CAN module has entered the CAN sleep
mode from the self-test mode, however, the module is released from the CAN sleep mode in the same manner as the
other operation modes (when the sleep mode is released while the CAN clock is supplied, however, the PSMODE0 bit
must be cleared by software after a falling edge is detected at the CAN reception pin (CRXD0).). To keep the module in
the CAN sleep mode, use the CAN reception pin (CRXD0) as a port pin.
Figure 21-34. CAN Module Terminal Connection in Self-Test Mode
CAN macro
Tx
Fixed to the
Rx
recessive level
CTXD0
CRXD0
R01UH0290EJ0300 Rev.3.00
Sep 19, 2011
Page 1140 of 1817