UPD70F3786GJ-GAE-AX Datasheet, PDF (469/1817 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-E Microcontrollers

V850ES/JH3-E, V850ES/JJ3-E
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
(8) TMT0 option register 0 (TT0OPT0)
The TT0OPT0 register is an 8-bit register that sets the capture/compare operation and detects overflows.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
After reset: 00H R/W Address: FFFFF607H
7
6
5
4
3
2
1
<0>
TT0OPT0
0
0 TT0CCS1 TT0CCS0 0
0
0
TT0OVF
TT0CCS1
TT0CCR1 register capture/compare selection
0
Selected as compare register
1
Selected as capture register (cleared by the TT0CTL0.TT0CE bit = 0)
The TT0CCS1 bit setting is valid only in the free-running timer mode.
TT0CCS0
TT0CCR0 register capture/compare selection
0
Selected as compare register
1
Selected as capture register (cleared by the TT0CTL0.TT0CE bit = 0)
The TT0CCS0 bit setting is valid only in the free-running timer mode.
TT0OVF
TMT0 overflow detection flag
Set (1)
Overflow occurred
Reset (0)
0 written to TT0OVF bit or TT0CTL0.TT0CE bit = 0
• The TT0OVF bit is set to 1 when the 16-bit counter value overflows from FFFFH
to 0000H in the free-running timer mode or the pulse width measurement mode.
• An overflow interrupt request signal (INTTT0OV) is generated when the TT0OVF
bit is set to 1. The INTTT0OV signal is not generated in modes other than the
free-running timer mode and the pulse width measurement mode.
• The TT0OVF bit is not cleared to 0 even when the TT0OVF bit or the TT0OPT0
register are read when the TT0OVF bit = 1.
• Before clearing the TT0OVF bit to 0 after generation of the INTTT0OV signal, be
sure to confirm (by reading) that the TT0OVF bit is set to 1.
• The TT0OVF bit can be both read and written, but the TT0OVF bit cannot be set
to 1 by software. Writing 1 has no effect on the operation of TMT0.
Cautions 1. Rewrite the TT0CCS1 and TT0CCS0 bits when the TT0CE bit = 0. (The
same value can be written when the TT0CE bit = 1.) If rewriting was
mistakenly performed, clear the TT0CE bit to 0 and then set these bits
again.
2. Be sure to set bits 1 to 3, 6, and 7 to “0”.
R01UH0290EJ0300 Rev.3.00
Sep 19, 2011
Page 469 of 1817