UPD70F3786GJ-GAE-AX Datasheet, PDF (490/1817 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-E Microcontrollers

V850ES/JH3-E, V850ES/JJ3-E
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
Figure 9-9. Register Setting for Interval Timer Mode Operation (2/2)
(d) TMT0 counter read buffer register (TT0CNT)
By reading the TT0CNT register, the count value of the 16-bit counter can be read.
(e) TMT0 capture/compare register 0 (TT0CCR0)
If the TT0CCR0 register is set to D0, the interval is as follows.
Interval = (D0 + 1) × Count clock cycle
(f) TMT0 capture/compare register 1 (TT0CCR1)
The TT0CCR1 register is not used in the interval timer mode. However, the set value of the TT0CCR1
register is transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches
the value of the CCR1 buffer register, the TOT01 pin output is inverted and a compare match interrupt
request signal (INTTT0CC1) is generated.
By setting this register to the same value as the value set in the TT0CCR0 register, a square wave can
be output from the TOT01 pin.
When the TT0CCR1 register is not used, it is recommended to set its value to FFFFH. Also mask the
register by the interrupt mask flag (TT0CCIC1.TT0CCMK1).
Remark
TMT0 control register 2 (TT0CTL2), TMT0 I/O control register 1 (TT0IOC1), TMT0 I/O control
register 2 (TT0IOC2), TMT0 I/O control register 3 (TT0IOC3), TMT0 option register 0
(TT0OPT0), TMT0 option register 1 (TT0OPT1), and TMT0 counter write register (TT0TCW)
are not used in the interval timer mode.
R01UH0290EJ0300 Rev.3.00
Sep 19, 2011
Page 490 of 1817