RX71M_15 Datasheet, PDF (69/228 Pages) Renesas Technology Corp – Renesas MCUs

RX71M Group
3. Address Space
3. Address Space
3.1 Address Space
This MCU has a 4-Gbyte address space, consisting of the range of addresses from 0000 0000h to FFFF FFFFh. That is,
linear access to an address space of up to 4 Gbytes is possible, and this contains both program and data areas.
Figure 3.1 shows the memory maps in the respective operating modes. Accessible areas will differ according to the
operating mode and states of control bits.
Single-chip mode*¹
0000 0000h
On-chip RAM ^{*2, *5}
0008 0000h
000A 4000h
000A 6000h
0010 0000h
0011 0000h
0012 0040h
0012 0070h
007E 0000h
007F 0000h
007F 8000h
007F 9000h
Peripheral I/O registers
Standby RAM
Peripheral I/O registers
On-chip ROM
(data flash memory)
Reserved area*³
On-chip ROM (option-setting memory)
Reserved area*³
On-chip ROM (write only)*²
Reserved area*³
FCU-RAM area*⁴
Reserved area*³
007F E000h
0080 0000h
00FF 8000h
0100 0000h
Peripheral I/O register
Reserved area*³
ECC-RAM
On-chip ROM enabled
extended mode
0000 0000h
*2, *5
On-chip RAM
0008 0000h
000A 4000h
000A 6000h
0010 0000h
0011 0000h
0012 0040h
0012 0070h
007E 0000h
007F 0000h
007F 8000h
007F 9000h
Peripheral I/O registers
Standby RAM
Peripheral I/O registers
On-chip ROM
(data flash memory)
Reserved area*³
On-chip ROM (option-setting memory)
Reserved area*³
On-chip ROM (write only)*²
Reserved area*³
FCU-RAM area*⁴
Reserved area*³
007F E000h
0080 0000h
00FF 8000h
0100 0000h
Peripheral I/O register
Reserved area*³
ECC-RAM
External address space
(CS area)
On-chip ROM disabled
extended mode
0000 0000h
*2, *5
On-chip RAM
0008 0000h
000A 4000h
000A 6000h
0010 0000h
Peripheral I/O registers
Standby RAM
Peripheral I/O registers
Reserved area*³
00FF 8000h
0100 0000h
ECC-RAM
External address space
(CS area)
Reserved area*³
0800 0000h
1000 0000h
External address space
(SDRAM area)
0800 0000h
1000 0000h
External address space
(SDRAM area)
Reserved area*³
Reserved area*³
FEFF F000h
FF00 0000h
On-chip ROM (FCU firmware)
(read only)*⁴
Reserved area*³
FF7F 8000h
On-chip ROM (user boot)
(read only)
FF80 0000h
Reserved area*³
FFC0 0000h
FFFF FFFFh
On-chip ROM (program ROM)
(read only)*²
FEFF F000h
FF00 0000h
On-chip ROM (FCU firmware)
(read only)*⁴
Reserved area*³
FF7F 8000h
FF80 0000h
On-chip ROM (user boot)
(read only)
Reserved area*³
FFC0 0000h
FFFF FFFFh
On-chip ROM (program ROM)
(read only)*²
FF00 0000h
External address space
FFFF FFFFh
Note 1. The address space in boot mode and user boot mode/USB boot mode is the same as the address space in single-chip
mode.
Note 2. The capacity of ROM/RAM differs depending on the products.
Code
Flash
Memory
Capacity
Address
Data
Flash
Memory
Capacity
Address
RAM
Capacity Address
4 Mbytes
3 Mbytes
FFC0 0000h to FFFF FFFFh
FFD0 0000h to FFFF FFFFh
64 Kbytes 0010 0000h to 0010 FFFFh
512
Kbytes
0000 0000h to 0007 FFFFh
2.5 Mbytes FFD8 0000h to FFFF FFFFh
2 Mbytes FFE0 0000h to FFFF FFFFh
Note 3. Reserved areas should not be accessed.
Note 4. The FCU-RAM and the on-chip ROM (FCU firmware) are reserved in products that do not include the FCU-RAM. For
details on the FCU, see section 63, Flash Memory, in the User’s Manual: Hardware.
Note 5. When MEMWAIT = 1, access to addresses in the range from 0004 0000h to 0007 FFFFh of the on-chip RAM space and
to the on-chip ROM area (program ROM) takes two cycles whether for reading or writing.
Figure 3.1
Memory Map in Each Operating Mode
R01DS0249EJ0100 Rev.1.00
Jan 15, 2015
Page 69 of 228