RX71M_15 Datasheet, PDF (115/228 Pages) Renesas Technology Corp – Renesas MCUs

RX71M Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (43 / 67)
Address
Module
Symbol Register Name
000C 0110h ETHER ETHERC Status Register
C0
000C 0118h ETHER ETHERC Interrupt Enable Register
C0
000C 0120h ETHER PHY Interface Register
C0
000C 0128h ETHER PHY Status Register
C0
000C 0140h ETHER Random Number Generation Counter Upper Limit
C0
Setting Register
000C 0150h ETHER IPG Register
C0
000C 0154h ETHER Automatic PAUSE Frame Register
C0
000C 0158h ETHER Manual PAUSE Frame Register
C0
000C 0160h ETHER Received PAUSE Frame Counter
C0
000C 0164h ETHER PAUSE Frame Retransmit Count Setting Register
C0
000C 0168h ETHER PAUSE Frame Retransmit Counter
C0
000C 016Ch ETHER Broadcast Frame Receive Count Setting Register
C0
000C 01C0h ETHER MAC Address Upper Bit Register
C0
000C 01C8h ETHER MAC Address Lower Bit Register
C0
000C 01D0h ETHER Transmit Retry Over Counter Register
C0
000C 01D4h ETHER Late Collision Detect Counter Register
C0
000C 01D8h ETHER Lost Carrier Counter Register
C0
000C 01DCh ETHER Carrier Not Detect Counter Register
C0
000C 01E4h ETHER CRC Error Frame Receive Counter Register
C0
000C 01E8h ETHER Frame Receive Error Counter Register
C0
000C 01ECh ETHER Too-Short Frame Receive Counter Register
C0
000C 01F0h ETHER Too-Long Frame Receive Counter Register
C0
000C 01F4h ETHER Received Alignment Error Frame Counter Register
C0
000C 01F8h ETHER Multicast Address Frame Receive Counter Register
C0
000C 0200h EDMAC EDMAC Mode Register
1
000C 0208h EDMAC EDMAC Transmit Request Register
1
000C 0210h EDMAC EDMAC Receive Request Register
1
000C 0218h EDMAC Transmit Descriptor List Start Address Register
1
000C 0220h EDMAC Receive Descriptor List Start Address Register
1
000C 0228h EDMAC ETHERC/EDMAC Status Register
1
000C 0230h EDMAC ETHERC/EDMAC Status Interrupt Enable Register
1
Register
Symbol
ECSR
ECSIPR
PIR
PSR
RDMLR
IPGR
APR
MPR
RFCF
TPAUSER
TPAUSECR
BCFRR
MAHR
MALR
TROCR
CDCR
LCCR
CNDCR
CEFCR
FRECR
TSFRCR
TLFRCR
RFCR
MAFCR
EDMR
EDTRR
EDRRR
TDLAR
RDLAR
EESR
EESIPR
Number of Access Cycles
Number Access
of Bits Size ICLK PCLK ICLK  PCLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
13, 14 PCLKA
2 to 7 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
32
32
4, 5 PCLKA
2, 3 ICLK
Related
Function
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
ETHERC
EDMACa
EDMACa
EDMACa
EDMACa
EDMACa
EDMACa
EDMACa
R01DS0249EJ0100 Rev.1.00
Jan 15, 2015
Page 115 of 228