RX71M_15 Datasheet, PDF (132/228 Pages) Renesas Technology Corp – Renesas MCUs

RX71M Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (60 / 67)
Address
Module
Symbol Register Name
000D 0120h RSPI1 RSPI Control Register
000D 0121h RSPI1 RSPI Slave Select Polarity Register
000D 0122h RSPI1 RSPI Pin Control Register
000D 0123h RSPI1 RSPI Status Register
000D 0124h RSPI1 RSPI Data Register
000D 0128h RSPI1 RSPI Sequence Control Register
000D 0129h RSPI1 RSPI Sequence Status Register
000D 012Ah RSPI1 RSPI Bit Rate Register
000D 012Bh RSPI1 RSPI Data Control Register
000D 012Ch RSPI1 RSPI Clock Delay Register
000D 012Dh RSPI1 RSPI Slave Select Negation Delay Register
000D 012Eh RSPI1 RSPI Next-Access Delay Register
000D 012Fh RSPI1 RSPI Control Register 2
000D 0130h RSPI1 RSPI Command Register 0
000D 0132h RSPI1 RSPI Command Register 1
000D 0134h RSPI1 RSPI Command Register 2
000D 0136h RSPI1 RSPI Command Register 3
000D 0138h RSPI1 RSPI Command Register 4
000D 013Ah RSPI1 RSPI Command Register 5
000D 013Ch RSPI1 RSPI Command Register 6
000D 013Eh RSPI1 RSPI Command Register 7
000D 0400h USBA System Configuration Control Register
000D 0402h USBA CPU Bus Wait Register
000D 0404h USBA System Configuration Status Register
000D 0406h USBA PLL Status Register
000D 0408h USBA Device State Control Register 0
000D 0414h USBA CFIFO Port Register
000D 0418h USBA D0FIFO Port Register
000D 041Ch USBA D1FIFO Port Register
Register
Symbol
SPCR
SSLP
SPPCR
SPSR
SPDR
SPSCR
SPSSR
SPBR
SPDCR
SPCKD
SSLND
SPND
SPCR2
SPCMD0
SPCMD1
SPCMD2
SPCMD3
SPCMD4
SPCMD5
SPCMD6
SPCMD7
SYSCFG
BUSWAIT
SYSSTS0
PLLSTA
DVSTCTR0
CFIFO
D0FIFO
D1FIFO
Number of Access Cycles
Number Access
of Bits Size ICLK PCLK ICLK  PCLK
Related
Function
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
32
32
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
8
8
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
RSPIa
16
16
3, 4 PCLKB
2 ICLK
USBAa
16
16
3, 4 PCLKB
2 ICLK
USBAa
16
16
(3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
16
16
(3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
16
16
(3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
32 8,16,32 (3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
32 8,16,32 (3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
32 8,16,32 (3 + BUSWAIT) Rounded up to USBAa
PCLKA or more _{the nearest}
integer greater
than 1 + (3 +
BUSWAIT) ×
(frequency ratio of
ICLK/PCLKB)*⁵
R01DS0249EJ0100 Rev.1.00
Jan 15, 2015
Page 132 of 228