CLRC663 Datasheet, PDF (95/132 Pages) NXP Semiconductors – Contactless reader IC

NXP Semiconductors
CLRC663
Contactless reader IC
Table 160. RxThreshold bits
Bit
Symbol Description
7 to 4 MinLevel Defines the MinLevel of the reception.
Note: The MinLevel should be higher than the noise level in the system
3 to 0 MinLevelP Defines the MinLevel of the phase shift detector unit
9.12.5 Rcv
Table 161. Rcv register (address 38h)
Bit
7
6
Symbol Rcv_Rx_single RFU
Access
r/w
-
rights
5
4
SigInSel
r/w
3
2
RFU
-
1
0
CollLevel
r/w
Table 162. Rcv bits
Bit
Symbol
7
Rcv_Rx_single
6
5 to 4
RFU
SigInSel
3 to 2
1 to 0
RFU
CollLevel
Description
Single RXP Input Pin Mode;
0: Fully Differential;
1: Quasi-Differential
-
Defines input for the signal processing unit
0h - idle
1h - internal analog block (RX)
2h - signal in over envelope (ISO/IEC14443A)
3h - signal in over s3c-generic
-
Defines the strength of a signal to be interpreted as a collision:
0h - Collision has at least 1/8 of signal strength
1h - Collision has at least 1/4 of signal strength
2h - Collision has at least 1/2 of signal strength
3h - Collision detection is switched off.
9.12.6 RxAna
This register allows to set the gain (rcv_gain) and high pass corner frequencies
(rcv_hpcf).
Table 163. RxAna register (address 39h)
Bit
7
6
5
Symbol
VMid_r_sel
Access
r/w
rights
4
RFU
-
3
2
rcv_hpcf
r/w
1
0
rcv_gain
r/w
CLRC663
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
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