CLRC663 Datasheet, PDF (93/132 Pages) NXP Semiconductors – Contactless reader IC

NXP Semiconductors
CLRC663
Contactless reader IC
9.12 Receiver configuration registers
9.12.1 RxSofD
Table 153. RxSofD register (address 34h)
Bit
76
5
4
Symbol
RFU
SOF_En SOFDetected
Access
-
r/w
dy
rights
3
RFU
-
2
SubC_En
r/w
1
SubC_Detected
dy
0
SubC_Present
r
Table 154. RxSofD bits
Bit Symbol
7 to 6 RFU
5
SOF_En
4
SOF_Detected
3
RFU
2
SubC_En
1
SubC_Detected
0
SubC_Present
Description
-
If set and a SOF is detected an RxSOFIrq is raised
Shows that a SOF is or was detected. Can be cleared by SW
-
If set and a subcarrier is detected an RxSOFIrq is raised.
Shows that a subcarrier is or was detected. Can be cleared by SW
Shows that a subcarrier is currently detected.
9.12.2 RxCtrl
Table 155. RxCtrl register (address 35h)
Bit
7
6
Symbol RxAllowBits RxMultiple
Access
r/w
r/w
rights
5
RxEOFType
r/w
4
EGT_Check
r/w
3
EMD_Sup
r/w
2
1
0
Baudrate
r/w
Table 156. RxCtrl bits
Bit
Symbol
7
RxAllowBits
6
RxMultiple
5
RxEOFType
Description
If set, data is written into FIFO even if CRC is enabled, and no
complete byte has been received.
If set, RxMultiple is activated and the receiver will not terminate
automatically (refer Section 8.10.3.6 “Receive command”).
If set to logic 1, at the end of a received data stream an error byte is
added to the FIFO. The error byte is a copy of the Error register.
0: EOF as defined in the RxEOFSymbolReg is expected.
1: ISO/IEC14443B EOF is expected.
Note: Clearing this bit to 0 and clearing bit 0 and bit 1 in the
RxEOFSymbolReg disables the EOF check
CLRC663
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
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