CLRC663 Datasheet, PDF (50/132 Pages) NXP Semiconductors – Contactless reader IC

NXP Semiconductors
CLRC663
Contactless reader IC
8.8 Clock generation
8.8.1 Crystal oscillator
The clock applied to the CLRC663 acts as time basis for generation of the carrier sent out
at TX and for the quadrature mixer I and Q clock generation as well as for the coder and
decoder of the synchronous system. Therefore stability of the clock frequency is an
important factor for proper performance. To obtain highest performance, clock jitter has to
be as small as possible. This is best achieved by using the internal oscillator buffer with
the recommended circuitry.
READER IC
XTAL1 XTAL2
Fig 32. Quartz connection
27.12 MHz
001aam308
Table 40.
Symbol
f_xtal
f_xtal/f_xtal
ESR
C_L
P_xtal
Crystal requirements recommendations
Parameter
Conditions
crystal frequency
relative crystal
frequency variation
equivalent series
resistance
load capacitance
crystal power
dissipation
Min
-
250
Typ
27.12
-
max
-
+250
Unit
MHz
ppm
-
50
100 
-
10
-
pF
-
50
100 W
8.8.2 IntegerN PLL clock line
The CLRC663 is able to provide a clock with configurable frequency at CLKOUT from
1 MHz to 24 MHz (PLL_Ctrl and PLL_DIV). There it can serve as a clock source to a
microcontroller which avoids the need of a second crystal oscillator in the reader system.
Clock source for the IntegerN-PLL is the 27.12 MHz crystal oscillator.
Two dividers are determining the output frequency. First a feedback integer-N divider
configures the VCO frequency to be N  fin/2 (control signal pll_set_divfb). As supported
Feedback Divider Ratios are 23, 27 and 28, VCO frequencies can be
23  fin / 2 (312 MHz), 27  fin / 2 (366 MHz) and 28  fin / 2 (380 MHz).
The VCO frequency is divided by a factor which is defined by the output divider
(pll_set_divout). Table 41 “Divider values for selected frequencies using the integerN PLL”
shows the accuracy achieved for various frequencies (integer multiples of 1 MHz and
some typical RS232 frequencies) and the divider ratios to be used. The register bit
ClkOutEn enables the clock at CLKOUT pin.
The following formula can be used to calculate the output frequency:
CLRC663
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
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