English
Language : 

CLRC663 Datasheet, PDF (60/132 Pages) NXP Semiconductors – Contactless reader IC
NXP Semiconductors
CLRC663
Contactless reader IC
9. CLRC663 registers
9.1 Register bit behavior
Depending on the functionality of a register, the access conditions to the register can vary.
In principle, bits with same behavior are grouped in common registers. The access
conditions are described in Table 45.
Table 45. Behavior of register bits and their designation
Abbreviation Behavior
Description
r/w
read and write These bits can be written and read via the host interface. Since
they are used only for control purposes, the content is not
influenced by the state machines but can be read by internal state
machines.
dy
dynamic
These bits can be written and read via the host interface. They
can also be written automatically by internal state machines, for
example Command register changes its value automatically after
the execution of the command.
r
read only
These register bits indicates hold values which are determined by
internal states only.
w
write only
Reading these register bits always returns zero.
RFU
-
These bits are reserved for future use and must not be changed.
In case of a required write access, it is recommended to write a
logic 0.
Table 46. CLRC663 registers overview
Address Register name
00h
Command
01h
HostCtrl
02h
FIFOControl
03h
WaterLevel
04h
FIFOLength
05h
FIFOData
06h
IRQ0
07h
IRQ1
08h
IRQ0En
09h
IRQ1En
0Ah
Error
0Bh
Status
0Ch
RxBitCtrl
0Dh
RxColl
0Eh
TControl
0Fh
T0Control
10h
T0ReloadHi
11h
T0ReloadLo
12h
T0CounterValHi
13h
T0CounterValLo
Function
Starts and stops command execution
Host control register
Control register of the FIFO
Level of the FIFO underflow and overflow warning
Length of the FIFO
Data In/Out exchange register of FIFO buffer
Interrupt register 0
Interrupt register 1
Interrupt enable register 0
Interrupt enable register 1
Error bits showing the error status of the last command execution
Contains status of the communication
Control register for anticollision adjustments for bit oriented protocols
Collision position register
Control of Timer 0..3
Control of Timer0
High register of the reload value of Timer0
Low register of the reload value of Timer0
Counter value high register of Timer0
Counter value low register of Timer0
CLRC663
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
60 of 132