CLRC663 Datasheet, PDF (112/132 Pages) NXP Semiconductors – Contactless reader IC

NXP Semiconductors
CLRC663
Contactless reader IC
9.17.3 RxSyncValH
Table 229. RxSyncValH register (address5Ah)
Bit
7
6
5
Symbol
Access
rights
4
3
RxSyncValH
r/w
2
1
0
Table 230. RxSyncValH bits
Bit
Symbol
Description
15 to 0 RxSyncValH Defines the high byte of the Start Of Frame (SOF) pattern, which must
be in front of the receiving data.
9.17.4 RxSyncValL
Table 231. RxSyncValL register (address 5Bh)
Bit
7
6
5
Symbol
Access
rights
4
3
RxSyncValL
r/w
2
1
0
Table 232. RxSyncValL bits
Bit
Symbol
Description
7 to 0
RxSyncValL Defines the low byte of the Start Of Frame (SOF) Pattern, which must
be in front of the receiving data.
9.17.5 RxSyncMod
Table 233. RxSyncMode register (address 5Ch)
Bit
7
6
5
4
Symbol
SyncLen
Access
r/w
rights
3
SyncNegEdge
r/w
2
LastSyncHalf
r/w
1
0
SyncType
r/w
Table 234. RxSyncMod bits
Bit
Symbol
Description
7 to 4 SyncLen
Defines how many Bits of registers RxSyncValHi and RxSyncValLo are
valid.
3
SyncNegEdge Is used for SOF with no correlation peak. The first negative edge of the
correlation is used for defining the bid grid
2
LastSyncHalf The last Bit of the Sync mode has only half of the length compared to
all other bits. (ISO/IEC 18000-3 mode 3/ EPC Class-1HF)
1 to 0 SyncType
0: all 16 bits of SyncVal are interpreted as burst.
1: a nibble of bits is interpreted as one bit in following way:
{data, coll} data = zero or one; coll = 1 means a collision on this bit.
Note: if Coll = 1 the value of data is ignored.
2: the synchronisation is done at every start bit of each byte (type B)
3: RFU
CLRC663
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
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