CLRC663 Datasheet, PDF (38/132 Pages) NXP Semiconductors – Contactless reader IC

NXP Semiconductors
CLRC663
Contactless reader IC
CLRC663
Product data sheet
COMPANY PUBLIC
The registers Section 9.8 and Section 9.10 control the data rate, the framing during
transmission and the setting of the antenna driver to support the requirements at the
different specified modes and transfer speeds.
Table 27. Settings for TX1 and TX2
TxClkMode
(binary)
Tx1 and TX2 output
000
High impedance
001
0
010
1
110
RF high side push
101
RF low side pull
111
13.56 MHz clock derived
from 27.12 MHz quartz
divided by 2
Remarks
-
output pulled to 0 in any case
output pulled to 1 in any case
open drain, only high side (push) MOS supplied
with clock, clock parity defined by invtx; low side
MOS is off
open drain, only low side (pull) MOS supplied
with clock, clock parity defined by invtx; high
side MOS is off
push/pull Operation, clock polarity defined by
invtx; setting for 10% modulation
Register TXamp and the bits for set_residual_carrier can define the modulation index:
Table 28. Setting residual carrier and modulation index by TXamp.set_residual_carrier
set_residual_carrier (decimal) residual carrier [%]
modulation index [%]
0
99
0.5
1
98
1.0
2
96
2.0
3
94
3.1
4
91
4.7
5
89
5.8
6
87
7.0
7
86
7.5
8
85
8.1
9
84
8.7
10
83
9.3
11
82
9.9
12
81
10.5
13
80
11.1
14
79
11.7
15
78
12.4
16
77
13.0
17
76
13.6
18
75
14.3
19
74
14.9
20
72
16.3
21
70
17.6
22
68
19.0
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 3 April 2012
171133
© NXP B.V. 2012. All rights reserved.
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