UM10562 Datasheet, PDF (838/942 Pages) NXP Semiconductors – LPC408x/407x User manual

NXP Semiconductors
UM10562
Chapter 35: LPC408x/407x General Purpose DMA controller
Table 702. DMA Software Burst Request Register (SOFTBREQ, address 0x2008 0020) bit description
Bit Symbol
Description
15:0 SOFTBREQ Software burst request flags for each of 16 possible sources. Each bit represents one DMA request
line or peripheral Description (refer to Table 692 for peripheral hardware connections to the DMA
controller):
0 - writing 0 has no effect.
1 - writing 1 generates a DMA burst request for the corresponding request line.
31:16 -
Reserved. Read value is undefined, only zero should be written.
Note: It is recommended that software and hardware peripheral requests are not used at
the same time.
35.5.10 DMA Software Single Request register
The DMACSoftSReq Register is read/write and enables DMA single transfer requests to
be generated by software. A DMA request can be generated for each source by writing a
1 to the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting single DMA
transfers. A request can be generated from either a peripheral or the software request
register. Table 703 shows the bit assignments of the DMACSoftSReq Register.
Table 703. DMA Software Single Request register bit description
Bit Symbol
Description
15:0 SOFTSREQ Software single transfer request flags for each of 16 possible sources. Each bit represents one
DMA request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA single transfer request for the corresponding request line.
31:16 -
Reserved. Read value is undefined, only zero should be written.
35.5.11 DMA Software Last Burst Request register
The DMACSoftLBReq Register is read/write and enables DMA last burst requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last burst DMA
transfers. A request can be generated from either a peripheral or the software request
register. Table 704 shows the bit assignments of the DMACSoftLBReq Register.
Table 704. DMA Software Last Burst Request Register (SOFTLBREQ, address 0x2008 0028) bit description
Bit Symbol
Description
15:0 SOFTLBREQ Software last burst request flags for each of 16 possible sources. Each bit represents one DMA
request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA last burst request for the corresponding request line.
31:16 -
Reserved. Read value is undefined, only zero should be written.
UM10562
User manual
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Rev. 1 — 13 September 2012
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