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UM10562 Datasheet, PDF (320/942 Pages) NXP Semiconductors – LPC408x/407x User manual
UM10562
Chapter 12: LPC408x/407x USB device controller
Rev. 1 — 13 September 2012
User manual
12.1 How to read this chapter
This chapter describes the USB device controller which is present on LPC408x/407x
family devices. On some family devices, the USB controller can also be configured for
Host or OTG operation (see Section 1.4 for details).
12.2 Basic configuration
The USB controller is configured using the following registers:
1. Power: In the PCONP register (Section 3.3.2.2), set bit PCUSB.
Remark: On reset, the USB block is disabled (PCUSB = 0).
2. Clock: The USB block can be used with either the Main PLL (PLL0), or with the
alternate PLL (PLL1) to obtain the USB clock. See Section 3.10.
3. Pins: Select the required USB pins and their modes in the relevant IOCON registers
(Section 7.4.1).
4. Wake-up: Activity on the USB bus port can wake up the microcontroller from
Power-down mode, see Section 3.12.8.
5. Interrupts: Interrupts are enabled in the NVIC using the appropriate Interrupt Set
Enable register.
6. The USB global interrupt status is visible in the USBINTSTAT register (Table 37).
7. Initialization: See Section 12.13.
12.3 Introduction
The Universal Serial Bus (USB) is a four-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports hot
plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The host schedules transactions in 1 ms frames. Each frame contains a Start-Of-Frame
(SOF) marker and transactions that transfer data to or from device endpoints. Each device
can have a maximum of 16 logical or 32 physical endpoints. There are four types of
transfers defined for the endpoints. Control transfers are used to configure the device.
Interrupt transfers are used for periodic data transfer. Bulk transfers are used when the
rate of transfer is not critical. Isochronous transfers have guaranteed delivery time but no
error correction.
For more information on the Universal Serial Bus, see the USB Implementers Forum
website.
The USB device controller enables full-speed (12 Mb/s) data exchange with a USB host
controller.
UM10562
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
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