UM10562 Datasheet, PDF (303/942 Pages) NXP Semiconductors – LPC408x/407x User manual

NXP Semiconductors
UM10562
Chapter 11: LPC408x/407x LCD controller
11.7.7 LCD Control register
The LCD_CTRL register controls the LCD operating mode and the panel pixel
parameters.
The contents of the LCD_CTRL register are described in Table 228.
Table 228. LCD Control register (CTRL, address 0x2008 8018) bit description
Bits Symbol
Description
Reset
value
0
LCDEN
LCD enable control bit.
0
0 = LCD disabled. Signals LCD_LP, LCD_DCLK, LCD_FP, LCD_ENAB_M, and LCD_LE are
low.
1 = LCD enabled. Signals LCD_LP, LCD_DCLK, LCD_FP, LCD_ENAB_M, and LCD_LE are
high.
See LCD power-up and power-down sequence for details on LCD power sequencing.
3:1 LCDBPP
LCD bits per pixel. Selects the number of bits per LCD pixel:
0
000 = 1 bpp.
001 = 2 bpp.
010 = 4 bpp.
011 = 8 bpp.
100 = 16 bpp.
101 = 24 bpp (TFT panel only).
110 = 16 bpp, 5:6:5 mode.
111 = 12 bpp, 4:4:4 mode.
4
LCDBW
STN LCD monochrome/color selection.
0
0 = STN LCD is color.
1 = STN LCD is monochrome.
This bit has no meaning in TFT mode.
5
LCDTFT
LCD panel TFT type selection.
0
0 = LCD is an STN display. Use gray scaler.
1 = LCD is a TFT display. Do not use gray scaler.
6
LCDMONO8 Monochrome LCD interface width. Controls whether a monochrome STN LCD uses a 4 or 0
8-bit parallel interface. It has no meaning in other modes and must be programmed to zero.
0 = monochrome LCD uses a 4-bit interface.
1 = monochrome LCD uses a 8-bit interface.
7
LCDDUAL Single or Dual LCD panel selection. STN LCD interface is:
0
0 = single-panel.
1 = dual-panel.
8
BGR
Color format selection.
0
0 = RGB: normal output.
1 = BGR: red and blue swapped.
9
BEBO
Big-endian Byte Order. Controls byte ordering in memory:
0
0 = little-endian byte order.
1 = big-endian byte order.
UM10562
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
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