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UM10562 Datasheet, PDF (793/942 Pages) NXP Semiconductors – LPC408x/407x User manual
NXP Semiconductors
UM10562
Chapter 31: LPC408x/407x Windowed Watchdog Timer (WWDT)
31.4 Register description
Table 664. Register overview: Watchdog (base address 0x4000 0000)
Name
Access Address Description
Reset Table
Value[1]
MOD
R/W
0x000 Watchdog mode register. This register determines the basic
0
665
mode and status of the Watchdog Timer.
TC
R/W
0x004 Watchdog timer constant register. The value in this register 0xFF 667
determines the time-out value.
FEED
WO
0x008 Watchdog feed sequence register. Writing 0xAA followed by
NA
668
0x55 to this register reloads the Watchdog timer with the
value contained in WDTC.
TV
RO
0x00C Watchdog timer value register. This register reads out the
0xFF 669
current value of the Watchdog timer.
WARNINT
R/W
0x014 Watchdog Warning Interrupt compare value.
0
670
WINDOW
R/W
0x018 Watchdog Window compare value.
0xFF FFFF 671
[1] Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
UM10562
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
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