BUK3F00-50WDXX Datasheet, PDF (43/52 Pages) NXP Semiconductors – Controller for TrenchPLUS FETs

NXP Semiconductors
BUK3F00-50WDxx
Controller for TrenchPLUS FETs
17.2 ADC accuracy
The ADC accuracy can be calculated at different measurement points using the graphs
Figure 10 and Figure 11 or associated equation. The effect of additional errors in the
reference current resistor can be estimated as a proportion of the resistor value.
25
absolute
bit error
20
15
001aag055
y = 10.4x² + 7.9x + 2
10
5
0
0
20
40
60
R_IREFCURR = 24.9 kΩ.
Fig 10. Maximum ADC bit errors (type 50WDFE)
80
100
ADC measurement (% full scale)
20
absolute
bit error
16
12
001aaf455
y = 5.5x² + 9.7x + 2
8
4
0
0
20
40
60
R_IREFCURR = 24.9 kΩ.
Fig 11. Maximum ADC bit errors (other 50WDxx types)
80
100
ADC measurement (% full scale)
BUK3F00-50WDXX_4
Product data sheet
Rev. 04 — 4 September 2008
© NXP B.V. 2008. All rights reserved.
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