BUK3F00-50WDXX Datasheet, PDF (23/52 Pages) NXP Semiconductors – Controller for TrenchPLUS FETs

NXP Semiconductors
BUK3F00-50WDxx
Controller for TrenchPLUS FETs
Table 16. Off-state open-circuit detection register (address 26h) bit description
Address Register
Bit Description
26h
OLDET_ONOFF 7 to 0 off-state open-circuit detection^[1] in individual channels 7 to 0:
1 = off-state open-circuit detection enabled in selected
channel
0 = off-state open-circuit detection disabled in selected
channel
[1] For high-side switches only.
9.5.7 Channel selection
Channel selection allows the FET channels to be switched on directly.
Table 17. Channel selection register (address 01h) bit description
Address Register
Bit
Description
01h
CHAN_ONOFF
7 to 0 direct switch-on of individual channels 7 to 0:
1 = selected channel on
0 = selected channel off
9.5.8 Mapping channels for direct channel control and PWM
Channels can be mapped to the input pin INP (intended for an external PWM signal) or to
pins IN0 to IN3 for direct control (intended for fail-safe channel control by connection to
V_CC(LOG)EXT and GND, or an external PWM signal). All channels (0 to 7) can be mapped
to pin INP. Channels 0 to 3 can be mapped to pins IN0 and IN1. Channels 4 to 7 can be
mapped to pins IN2 and IN3. Input pins IN0 plus IN1 and IN2 plus IN3 are combined
according to the AND/OR operation. If a channel is switched on (by register
CHAN_ONOFF), the channel is switched on irrespective of the state on the direct input
pins IN0 to IN3; see Section 9.5.7.
Table 18. Channel selection and pin mapping register (addresses 02h to 05h) bit
description
Address Register
Bit
Description
02h
IN02_MAP^[1][2]
direct input pins IN0 and IN2 mapping:
1 = mapped
0 = not mapped
7 to 4 map individual channels 7 to 4 to pin IN2
3 to 0 map individual channels 3 to 0 to pin IN0
03h
IN13_MAP^[1][2]
direct input pins IN1 and IN3 mapping:
1 = mapped
0 = not mapped
7 to 4 map individual channels 7 to 4 to pin IN3
3 to 0 map individual channels 3 to 0 to pin IN1
04h
INP_MAP^[2]
7 to 0 direct input pin INP map channels 7 to 0:
1 = mapped
0 = not mapped
BUK3F00-50WDXX_4
Product data sheet
Rev. 04 — 4 September 2008
© NXP B.V. 2008. All rights reserved.
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