BUK3F00-50WDXX Datasheet, PDF (25/52 Pages) NXP Semiconductors – Controller for TrenchPLUS FETs

NXP Semiconductors
BUK3F00-50WDxx
Controller for TrenchPLUS FETs
9.5.11 Trip and retry
This automatically handles short duration OCH, TONOCH and OCL faults. However,
switching into a short-circuit imposes considerable stress on the MOSFET and may
reduce its life. The user must ensure that the effects are fully evaluated before
implementation. If there is any doubt, then trip and retry should not be used.
If trip and retry is used and a channel still trips off, then the channel should not be turned
on again before the fault has been removed. This may require a lock-out feature in the
controlling software.
The settings for trip and retry are given in Table 19 “Protected settings”.
9.5.12 Trip-latch
The faults listed will trip-latch a channel: this will not allow the channel to turn on unless
the latch is cleared.
Overtemperature — with auto-reset turned off.
Analog overcurrent — with no retries allowed.
Turn-on overcurrent HIGH — (high-side switches only) with no retries allowed.
Overcurrent LOW — with no retries allowed and OCL tripping enabled.
To clear a channel trip-latch condition; see Section 11.1 “Reset for interrupt and SPI
watchdog”.
BUK3F00-50WDXX_4
Product data sheet
Rev. 04 — 4 September 2008
© NXP B.V. 2008. All rights reserved.
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