MC68HC05J3 Datasheet, PDF (9/92 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Paragraph
Number
TITLE
7
RESETS AND INTERRUPTS
Page
Number
7.1
7.1.1
7.1.2
7.1.3
7.2
7.3
7.3.1
7.4
7.5
7.5.1
7.5.2
7.5.3
7.6
Resets ...................................................................................................................7-1
Power-on reset .................................................................................................7-2
RESET pin .......................................................................................................7-2
Computer operating properly (COP) reset .......................................................7-2
Functions affected by reset....................................................................................7-3
Interrupts ...............................................................................................................7-3
Interrupt priorities .............................................................................................7-4
Non-maskable software interrupt (SWI).................................................................7-6
Maskable hardware interrupts ...............................................................................7-6
External interrupt (IRQ or keyboard)................................................................7-6
Core timer interrupts ........................................................................................7-6
16-bit timer interrupts .......................................................................................7-7
Hardware controlled interrupt sequence................................................................7-7
8
CPU CORE AND INSTRUCTION SET
8.1 Registers ...............................................................................................................8-1
8.1.1 Accumulator (A) ...............................................................................................8-2
8.1.2 Index register (X)..............................................................................................8-2
8.1.3 Program counter (PC) ......................................................................................8-2
8.1.4 Stack pointer (SP) ............................................................................................8-2
8.1.5 Condition code register (CCR).........................................................................8-2
8.2 Instruction set ........................................................................................................8-3
8.2.1 Register/memory Instructions ..........................................................................8-4
8.2.2 Branch instructions ..........................................................................................8-4
8.2.3 Bit manipulation instructions ............................................................................8-4
8.2.4 Read/modify/write instructions .........................................................................8-4
8.2.5 Control instructions ..........................................................................................8-4
8.2.6 Tables...............................................................................................................8-4
8.3 Addressing modes .................................................................................................8-11
8.3.1 Inherent............................................................................................................8-11
8.3.2 Immediate ........................................................................................................8-11
8.3.3 Direct................................................................................................................8-11
8.3.4 Extended..........................................................................................................8-12
8.3.5 Indexed, no offset.............................................................................................8-12
8.3.6 Indexed, 8-bit offset..........................................................................................8-12
8.3.7 Indexed, 16-bit offset........................................................................................8-12
8.3.8 Relative ............................................................................................................8-13
8.3.9 Bit set/clear ......................................................................................................8-13
8.3.10 Bit test and branch ...........................................................................................8-13
MC68HC05J3
TPG
MOTOROLA
iii