MC68HC05J3 Datasheet, PDF (44/92 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Bits 8 – 15 — MSB of counter/alternate counter register
A read of only the more significant byte (MSB) transfers the LSB to a buffer, which remains fixed
after the first MSB read, until the LSB is also read.
Bits 0 – 7 — LSB of counter/alternate counter register
A read of only the less significant byte (LSB) receives the count value at the time of reading.
6.2
Timer functions
The 16-bit programmable timer is monitored and controlled by a group of ten registers, full details
of which are contained in the following paragraphs. An explanation of the timer functions is
also given.
6
6.2.1 Timer control register – TCR
The timer control register at location $12 is used to enable the input capture (ICIE), output
compare (OCIE), and timer overflow (TOIE) interrupt enable functions as well as selecting input
edge sensitivity (IEDG) and output level polarity (OLV).
Timer control (TCR)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0012 ICIE OCIE TOIE 0
0
0 IEDG OLV 0000 00u0
ICIE — Input capture interrupt enable
1 (set) – Input capture interrupt enabled.
0 (clear) – Input capture interrupt disabled.
OCIE — Output compare interrupt enable
1 (set) – Output compare interrupt enabled.
0 (clear) – Output compare interrupt disabled.
TOIE — Timer overflow interrupt enable
1 (set) – Timer overflow interrupt enabled.
0 (clear) – Timer overflow interrupt disabled.
MOTOROLA
6-4
16-BIT PROGRAMMABLE TIMER
TPG
MC68HC05J3