MC68HC05J3 Datasheet, PDF (35/92 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

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CORE TIMER
The MC68HC05J3 has a 15-stage ripple counter called the core timer (CTIMER). Features of this
timer are: timer overflow; power-on reset (POR); real time interrupt (RTI), with four selectable
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interrupt rates; and a computer operating properly (COP) watchdog timer.
Internal bus
8
Internal processor clock
$09 CTCR
(Core timer counter)
8
f_OP / 2¹⁰
f_OP / 2²
f_OP
(÷4)
Overflow
detect
circuit
7-bit counter
f_OP / 2¹⁷
f_OP / 2¹⁴
RTI select circuit
$08 CTCSR
(Core timer control & status)
CTOF RTIF CTOFE RTIE 0
8
0 RT1 RT0
Interrupt circuit
COP
clear
COP watchdog
timer
(÷8)
To
To interrupt logic
reset
logic
Figure 5-1 Core timer block diagram
MC68HC05J3
CORE TIMER
TPG
MOTOROLA
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