MC68HC05J3 Datasheet, PDF (29/92 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

4
INPUT/OUTPUT PORTS
4
In single chip mode, the MC68HC05J3 has a total of 14 I/O lines, arranged as one 8-bit port (A)
and one 6-bit port (B). Each I/O line is individually programmable as either input or output, under
the software control of the data direction registers. Four of the port B pins can be configured to
respond to keyboard interrupts, while the other two are shared with the timer subsystem. The port
B configuration register provides the control for all pins of port B.
To avoid glitches on the output pins, data should be written to the I/O port data register before
writing ones to the corresponding data direction register bits to set the pins to output mode.
4.1
Input/output programming
The bidirectional port lines may be programmed as inputs or outputs under software control. The
direction of each pin is determined by the state of the corresponding bit in the port data direction
register (DDR). Each port has an associated DDR. Any I/O port pin is configured as an output if
its corresponding DDR bit is set. A pin is configured as an input if its corresponding DDR bit is
cleared.
At power-on or reset, all DDRs are cleared, thus configuring all port pins as inputs. The data
direction registers can be written to or read by the MCU. During the programmed output state, a
read of the data register actually reads the value of the output data buffer and not the I/O pin. The
operation of the standard port hardware is shown schematically in Figure 4-1.
This is further summarized in Table 4-1, which shows the effect of reading from, or writing to an
I/O pin in various circumstances. Note that the read/write signal shown is internal and not available
to the user.
MC68HC05J3
INPUT/OUTPUT PORTS
TPG
MOTOROLA
4-1