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MC68HC05J3 Datasheet, PDF (76/92 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit | |||
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Table 9-4 DC electrical characteristics for 3.3V operation
(VDD = 3.3 Vdc ± 10%, VSS = 0 Vdc, TA = TL to TH
Characteristic(1)
Symbol Min
Typ(2)
Max
Unit
Output high voltage (ILOAD = â 25 µA)
Output high voltage (ILOAD = + 25 µA)
Output high voltage (ILOAD = â 0.2 mA)
PA0â7, PB0â5
VOH VDD â 0.1
â
VOH
â
â
â
V
0.1
V
VOH VDD â 0.3 VDD â 0.3
â
V
Output low voltage (ILOAD = +0.4 mA)
PA0â7, PB0â5
VOL
â
0.2
0.3
V
Output low voltage (ILOAD = +4 mA)
PA0â7, PB0â5
VOL
â
0.4
0.5
V
Input high voltage
PA0â7, PB0â5, OSC1, IRQ, RESET
VIH
0.7VDD
â
VDD
V
Input low voltage
PA0â7, PB0â5, OSC1, IRQ, RESET
VIL
VSS
Supply current(3)
RUN (at 1.05 MHz bus frequency)
IDD
â
WAIT (at 1.05 MHz bus frequency)
â
STOP (oscillators off, 0 to 70°)
â
â
0.2VDD
V
2.0
5
mA
1.0
2
mA
1
50
µA
I/O ports high-Z leakage current
PA0â7, PB0â5
IOZ
â
â
±10
µA
Inputs high-Z leakage current
IRQ, RESET, OSC1
IOZ
â
â
±1
µA
Capacitance
Ports (as input or output)
COUT
â
â
12
pF
IRQ, RESET
CIN
â
â
TBD
pF
9
(1) All IDD measurements taken with suitable decoupling capacitors across the power supply to suppress the
transient switching currents inherent in CMOS designs (see Section 2.2.1).
(2) Typical values are at mid point of voltage range and at 25°C only.
(3) RUN and WAIT IDD: measured using an external square-wave clock source (fOSC = 2.1MHz); all inputs
0.2V from rail; no DC loads; maximum load on outputs 50pF (except OSC2 load 20pF).
WAIT IDD: only the timer system active; current varies linearly with the OSC2 capacitance.
WAIT and STOP IDD: all ports conï¬gured as inputs; VIL = 0.2V and VIH = VDD â 0.2V.
STOP IDD: measured with OSC1 = VDD.
MOTOROLA
9-4
ELECTRICAL SPECIFICATIONS
TPG
MC68HC05J3
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