MC68HC908JK1 Datasheet, PDF (78/210 Pages) Motorola, Inc – MC68HC908JK1

System Integration Module (SIM)
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
7.4.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module
(POR) generates a pulse to indicate that power-on has occurred. The
external reset pin (RST) is held low while the SIM counter counts out
4096 2OSCOUT cycles. Sixty-four 2OSCOUT cycles later, the CPU and
memories are released from reset to allow the reset vector sequence to
occur.
At power-on, the following events occur:
• A POR pulse is generated.
• The internal reset signal is asserted.
• The SIM enables the oscillator to drive 2OSCOUT.
• Internal clocks to the CPU and modules are held inactive for 4096
2OSCOUT cycles to allow stabilization of the oscillator.
• The RST pin is driven low during the oscillator stabilization time.
• The POR bit of the reset status register (RSR) is set and all other
bits in the register are cleared.
OSC1
PORRST
2OSCOUT
OSCOUT
RST
IAB
Technical Data
78
4096
CYCLES
32
CYCLES
32
CYCLES
Figure 7-7. POR Recovery
System Integration Module (SIM)
$FFFE
$FFFF
MC68H(R)C908JL3 — Rev. 1.0
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