MC68HC908JK1 Datasheet, PDF (151/210 Pages) Motorola, Inc – MC68HC908JK1

READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
WRITE PTA ($0000)
READ PTA ($0000)
DDRAx
PTAx
I/O Ports
Port A Data Register (PTA)
PTAPUEx
30k
PTAx
To Keyboard Interrupt Circuit
Figure 12-4. Port A I/O Circuit
When DDRAx is a logic 1, reading address $0000 reads the PTAx data
latch. When DDRAx is a logic 0, reading address $0000 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
12.4.2 Port A Input Pull-up Enable Register (PTAPUE)
The Port A Input Pull-up Enable Register (PTAPUE) contains a software
configurable pull-up device for each if the seven port A pins. Each bit is
individually configurable and requires the corresponding data direction
register, DDRAx be configured as input. Each pull-up device is
automatically and dynamically disabled when its corresponding DDRAx
bit is configured as output.
MC68H(R)C908JL3 — Rev. 1.0
MOTOROLA
I/O Ports
Technical Data
151