MC68HC908JK1 Datasheet, PDF (140/210 Pages) Motorola, Inc – MC68HC908JK1

Analog-to-Digital Converter (ADC)
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
11.4.2 Voltage Conversion
NOTE:
When the input voltage to the ADC equals V_DD, the ADC converts the
signal to $FF (full scale). If the input voltage equals V_SS, the ADC
converts it to $00. Input voltages between V_DD and V_SS are a
straight-line linear conversion. All other input voltages will result in $FF
if greater than V_DD and $00 if less than V_SS.
Input voltage should not exceed the analog supply voltages.
11.4.3 Conversion Time
Sixteen ADC internal clocks are required to perform one conversion. The
ADC starts a conversion on the first rising edge of the ADC internal clock
immediately following a write to the ADSCR. If the ADC internal clock is
selected to run at 1MHz, then one conversion will take 16µs to complete.
With a 1MHz ADC internal clock the maximum sample rate is 62.5kHz.
Conversion Time = ^{16 ADC Clock Cycles}
ADC Clock Frequency
Number of Bus Cycles = Conversion Time × Bus Frequency
11.4.4 Continuous Conversion
In the continuous conversion mode, the ADC continuously converts the
selected channel filling the ADC data register with new data after each
conversion. Data from the previous conversion will be overwritten
whether that data has been read or not. Conversions will continue until
the ADCO bit is cleared. The COCO bit (ADC Status & Control register,
$003C) is set after each conversion and can be cleared by writing the
ADC status and control register or reading of the ADC data register.
Technical Data
140
Analog-to-Digital Converter (ADC)
MC68H(R)C908JL3 — Rev. 1.0
MOTOROLA