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MC68HC908JK1 Datasheet, PDF (72/210 Pages) Motorola, Inc – MC68HC908JK1 | |||
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System Integration Module (SIM)
7.7 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
7.7.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
7.7.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
7.8 SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
7.8.1 Break Status Register (BSR) . . . . . . . . . . . . . . . . . . . . . . . . 91
7.8.2 Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . . . 92
7.8.3 Break Flag Control Register (BFCR) . . . . . . . . . . . . . . . . . . 94
7.2 Introduction
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. A block diagram of the SIM is
shown in Figure 7-1. Figure 7-2 is a summary of the SIM I/O registers.
The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
⢠Bus clock generation and control for CPU and peripherals
â Stop/wait/reset/break entry and recovery
â Internal clock control
⢠Master reset control, including power-on reset (POR) and COP
timeout
⢠Interrupt control:
â Acknowledge timing
â Arbitration control timing
â Vector address generation
⢠CPU enable/disable timing
⢠Modular architecture expandable to 128 interrupt sources
Technical Data
72
System Integration Module (SIM)
MC68H(R)C908JL3 â Rev. 1.0
MOTOROLA
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