MC68HC908JK1 Datasheet, PDF (152/210 Pages) Motorola, Inc – MC68HC908JK1

I/O Ports
Address: $000D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTA6EN PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE2 PTAPUE0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 12-5. Port A Input Pull-up Enable Register (PTAPUE)
PTA6EN — Enable PTA6 on OSC2
This read/write bit configures the OSC2 pin function when RC
oscillator option is selected. This bit has no effect for X-tal oscillator
option.
1 = OSC2 pin configured for PTA6 I/O, and has all the interrupt and
pull-up functions.
0 = OSC2 pin outputs the RC oscillator clock (RCCLK)
PTAPUE[6:0] — Port A Input Pull-up Enable bits
These read/write bits are software programmable to enable pull-up
devices on port A pins
1 = Corresponding port A pin configured to have internal pull if its
DDRA bit is set to 0
0 = Pull-up device is disconnected on the corresponding port A pin
regardless of the state of its DDRA bit.
Table 12-1 summarizes the operation of the port B pins.
Table 12-1. Port A Pin Functions
PTAPUE Bit
1
0
DDRA
Bit
0
0
PTA Bit
X⁽¹⁾
X
I/O Pin Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Accesses to DDRB
Read/Write
DDRA6-DDRA0
DDRA6-DDRA0
Accesses to PTB
Read
Pin
Pin
Write
PTA6-PTA0⁽³⁾
PTA6-PTA0⁽³⁾
X
1
X
Output
DDRA6-DDRA0
1. X = Don’t care.
2. I/O pin pulled to V_DD by internal pull-up.
3. Writing affects data register, but does not affect input.
4. Hi-Z = High Impedence
PTA6-PTA0
PTA6-PTA0
Technical Data
152
I/O Ports
MC68H(R)C908JL3 — Rev. 1.0
MOTOROLA