MC68HC908JK1 Datasheet, PDF (131/210 Pages) Motorola, Inc – MC68HC908JK1

Timer Interface Module (TIM)
I/O Registers
Address: $0023 TMODH
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10
Bit9
Bit8
Write:
Reset: 1
1
1
1
1
1
1
1
Address: $0024 TMODL
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 10-6. TIM Counter Modulo Registers (TMODH:TMODL)
NOTE: Reset the TIM counter before writing to the TIM counter modulo registers.
10.10.4 TIM Channel Status and Control Registers (TSC0:TSC1)
Each of the TIM channel status and control registers does the following:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input
capture trigger
• Selects output toggling on TIM overflow
• Selects 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
MC68H(R)C908JL3 — Rev. 1.0
MOTOROLA
Timer Interface Module (TIM)
Technical Data
131