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MC68HC908JK1 Datasheet, PDF (31/210 Pages) Motorola, Inc – MC68HC908JK1
Memory
Monitor ROM
Addr.
$000B
↓
$000C
$000D
$000E
↓
$0019
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Unimplemented Write:
Port A Input Pull-up Read:
Enable Register Write:
(PTAPUE) Reset:
PTA6EN
0
PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
0
0
0
0
0
0
0
Read:
Unimplemented Write:
$001A
$001B
$001C
Keyboard Status and Read: 0
Control Register Write:
(KBSCR) Reset: 0
Keyboard Interrupt Read: 0
Enable Register Write:
(KBIER) Reset: 0
Read:
Unimplemented Write:
0
0
0
KEYF
0
IMASKK MODEK
ACKK
0
0
0
0
0
0
0
KBIE6 KBIE5 KBIE4 KBIE3 KBIE2 KBIE1 KBIE0
0
0
0
0
0
0
0
IRQ Status and Control Read: 0
0
0
0
IRQF1
0
IMASK1
$001D
Register Write:
ACK1
(INTSCR) Reset: 0
0
0
0
0
0
0
Read:
$001E
Configuration Register 2
(CONFIG2)†
Write:
IRQPUD
R
R
LVIT1 LVIT0
R
R
Reset: 0
0
0
0*
0*
0
0
Read:
$001F
Configuration Register 1
(CONFIG1)†
Write:
COPRS
R
Reset: 0
0
R
LVID
R
SSREC STOP
0
0
0
0
0
† One-time writable register after each reset. * LVIT1 and LVIT0 reset to logic 0 by a power-on reset (POR) only.
TIM Status and Control Read: TOF
TOIE TSTOP
0
0
$0020
Register Write: 0
TRST
(TSC) Reset: 0
0
1
0
0
PS2
PS1
0
0
= Unimplemented
R = Reserved
MODE1
0
R
0
COPD
0
PS0
0
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 5)
MC68H(R)C908JL3 — Rev. 1.0
MOTOROLA
Memory
Technical Data
31