M37733MHBXXXFP Datasheet, PDF (34/89 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

PRELIMINARY _{NSootimcee: pTahriasmisentroict} ^{alimfinitsalasrpeescuifbicjeactitotno. change.}
MITSUBISHI MICROCOMPUTERS
M37733MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
CLOCK SYNCHRONOUS SERIAL
COMMUNICATION
A case where communication is performed between two clock
synchronous serial I/O ports as shown in Figure 41 will be described.
(The transmission side will be denoted by subscript j and the receiving
side will be denoted by subscript k.)
Bit 0 of the UARTj transmit/receive mode register and UARTk transmit/
receive mode register must be set to “1”, and bits 1 and 2 must be
“0”. The length of the transmission data is 8 bits.
Bit 3 of the UARTj transmit/receive mode register of the clock sending
side is cleared to “0” to select the internal clock. Bit 3 of the UARTk
transmit/receive mode register of the clock receiving side is set to “1”
to select the external clock. Bits 4, 5 and 6 are ignored in the clock
synchronous mode. Bit 7 must always be “0”.
The clock source is selected by bit 0 (CS0) and bit 1 (CS1) of the
clock sending side UARTj transmit/receive control register 0. If the
contents of the bit rate genarator is n, as shown in Figure 36, the
selected clock is divided by (n + 1), then by 2, passed through a
transmission control circuit, and output as transmission clock CLKj.
Therefore, when the selected clock is fi,
Bit Rate = fi / {(n + 1) ! 2}
On the clock receiving side, the CS0 and CS1 bits are ignored because
an external clock is selected.
The bit 2 of the clock sending side UARTj transmit/receive control
register 0 is cleared to “0” to select CTSj input. The bit 2 of the clock
receiving side is set to “1” to select RTSk output.
Whether to use the CTS and RTS signals is determined by bit 4 of the
UART transmit/receive control register 0. Set bit 4 to “0” when CTS
and RTS signals are used, and to “1” when they are not used.
UART2 has the CTS input function, but that does not have the RTS
output function (refer to Figure 40.)
When CTS and RTS signals are not used, the CTS/RTS pin can be
used as a normal port. The following describes the case when the
CTS and RTS signals are used. If CTS and RTS signals are not used,
the CTSj input condition is unnecessary and there is no RTSk output.
Output driver format of the transmit data output pin (TXDj), which is
the CMOS output or the N-channel open-drain output, is selected
with bit 5 (TXS) of the UARTj transmit/receive control register 0. When
bit 5 is “0”, the CMOS output format is selected. When bit 5 is “1”, the
N-channel open-drain output format is selected. When the N-channel
open-drain output format is selected, make sure to pull-up the data
line using a pull-up resistor.
UARTj transmission register
UARTj transmission buffer register
TxDj
TxDk
UARTk transmission register
UARTk transmission buffer register
UARTj receive buffer register
UARTj receive register
RxDj
UARTj transmit/receive mode register
0 !!! 0 0 0 1
UARTj transmit/receive control register 0
TFM CPL TxS
0
Tx
EPTY
0
CS1 CS0
UARTj transmit/receive control register 1
SUM PER FER OER RI RE TI TE
CLKj
CTSj
UARTk receive buffer register
RxDk
UARTk receive register
UARTk transmit/receive mode register
0 !!! 1 0 0 1
CLKk
UARTk transmit/receive control register 0
TFM CPL TxS
0
Tx
EPTY
1
!!
RTSk
UARTk transmit/receive control register 1
SUM PER FER OER RI RE TI TE
Note. UART2 does not include RTS output. The UART2 transmit/receive control register 0’s bit configuration is partialy different.
Fig. 41 Clock synchronous serial communication
34