M37733MHBXXXFP Datasheet, PDF (30/89 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
M37733MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SERIAL I/O PORTS
Three independent serial I/O ports are provided.
Figure 36 shows a block diagram of the serial I/O ports.
Table 5 shows the functional differences of three serial I/O ports
(UART 0, 1, 2).
Bits 0, 1, and 2 of the UARTi (i = 0, 1, 2) transmit/receive mode
register shown in Figure 37 are used to determine whether to use
port P8 or port P7 as a parallel port, a clock synchronous serial I/O
port, or an asynchronous serial I/O port (UART) using start and stop
bits.
Data bus (odd)
Data bus (even)
Bit converter (Note)
RxDi
Clock source selection
f2
f 16
f 64
f 512
Bit rate
generator
UART0
(Address 3116)
UART1
(Address 3916)
UART2
(Address 6516)
Internal
1/(n + 1)
Divider
0
00
0
0
0
0
D8
D7
D6
D5
D4
D3
D2
D1
D0
Receive
buffer register
UART0 (Addresses 3716, 3616)
UART1 (Addresses 3F16, 3E16)
UART2 (Addresses 6B16, 6A16)
Receive register
UART receive
1/16 Divider
Clock synchronous
Receive control
circuit
UART transmission
1/16 Divider
Transmission
Clock synchronous
control circuit
Clock synchronous
1/2 Divider ^{(Internal clock)}
Receive clock
Transmission clock
Transmisson register
TxDi
External
CLKi
Polarity
reversing circuit
CTSi/RTSi (Note)
(Note)
Clock synchronous
(Internal clock)
Clock synchronous
(External clock)
Transmission
D8 D7 D6 D5 D4 D3 D2 D1 D0 _{buffer register}
UART0 (Addresses 3316, 3216)
UART1 (Addresses 3B16, 3A16)
UART2 (Addresses 6716, 6616)
Bit converter (Note)
Note. UART2 does not include the bit converter, the polarity
reversing circuit and the RTSi output.
Data bus (odd)
Data bus (even)
Fig. 36 Serial I/O port block diagram
7 6 54 3 21 0
Addresses
UART 0 transmit/receive mode register 3016
UART 1 transmit/receive mode register 3816
Serial I/O mode selection bits
0 0 0 : Parallel port
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
Internal clock/External clock selection bit
0 : Internal clock
1 : External clock
Stop bit length selection bit
0 : 1 stop bit
1 : 2 stop bits
Odd/even parity selection bit
0 : Odd parity
1 : Even parity
Parity enable bit
0 : No parity
1 : With parity
Sleep function selection bit
0 : No sleep
1 : Sleep
7 65 4 32 1 0
Address
UART 2 transmit/receive mode register 6416
Serial I/O mode selection bits
0 0 0 : Parallel port
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
Internal clock/External clock selection bit
0 : Internal clock
1 : External clock
Stop bit length selection bit
0 : 1 stop bit
1 : 2 stop bits
Odd/even parity selection bit
0 : Odd parity
1 : Even parity
Parity enable bit
0 : No parity
1 : With parity
Note. The switch of A-D conversion interrupt and UART2 transmit/receive
interrupt is performed by bits 0 to 2. When selecting a parallel port, A-D
conversion interrupt is valid. When selecting a clock synchronous serial
I/O port or a UART, UART2 transmit/receive interrupt is valid.
Fig. 37 UARTi transmit/receive mode register bit configuration
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