PIC16F753 Datasheet, PDF (84/238 Pages) Microchip Technology – 14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F753/HV753
10.2.5 COMPARE DURING SLEEP
The Compare mode is dependent upon the system
clock (FOSC) for proper operation. Since FOSC is shut
down during Sleep mode, the Compare mode will not
function properly during Sleep.
TABLE 10-3: SUMMARY OF REGISTERS ASSOCIATED WITH COMPARE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON —
—
DC1B<1:0>
CCP1M<3:0>
87
CCPR1L
CCPR1L<7:0>
81
CCPR1H
CCPR1H<7:0>
81
INTCON
GIE
PEIE
T0IE
INTE
IOCIE
T0IF
INTF IOCIF
19
PIE1
TMR1GIE ADIE
—
—
HLTMR2IE HLTMR1IE TMR2IE TMR1IE 20
PIE2
—
—
C2IE
C1IE
—
COG1IE
—
CCP1IE 21
PIR1
TMR1GIF ADIF
—
—
HLTMR2IF HLTMR1IF TMR2IF TMR1IF 22
PIR2
—
—
C2IF
C1IF
—
COG1IF
—
CCP1IF
23
T1CON
TMR1CS<1:0>
T1CKPS<1:0>
T1OSCEN T1SYNC
— TMR1ON 71
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ T1GVAL
T1GSS<1:0>
72
DONE
TMR1H
TMR1H<7:0>
63*
TMR1L
TMR1L<7:0>
63*
TRISA
—
—
TRISA5 TRISA4 TRISA3⁽¹⁾ TRISA2 TRISA1 TRISA0
46
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Compare mode.
* Page provides register information.
Note 1: TRISA3 always reads ‘1’.
DS40001709A-page 84
Preliminary
 2013 Microchip Technology Inc.